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- Separate clock-up and clock-down lines
- Capable of driving common cathode LEDs and other displays directly
- Allows cascading without any external circuitry
- 100% tested for quiescent current at 20 V
- Maximum input current of 1 uA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
- Noise margin (full package-temperature range) =
1 V at VDD = 5 V
2 V at VDD = 10 V
2.5 V at VDD = 15 V - 5 V, 10 V and 15 V parametric ratings
Meets all requirements of JEDEC Tentative Standard No. 13B, Standard Specifications for Description of ‘B’ Series CMOS Devices.
- Applications
- Rate comparators
- General counting applications where display is desired
- Up-down counting applications where input pulses are random in nature
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